The transmission connections used for the mass memories with disk memories or tape drives are SCSI-type connections, standardized both by ANSI (American National Standard Institute) and ISO (International Standards Organization). The physical support for transmitting the connection is composed of a bus supporting two types of memories, namely magnetic disk memories and magnetic tape drives. According to the standard, up to six peripheral units, whether they are disk memories or tape drives can be connected on the same SCSI-type bus.
Another characteristic of the SCSI standard is the following: when a peripheral unit has received execution commands from the transmission system that consist either of entering data on the magnetic recording supports that they contain or reading them, these units can be disconnected from the physical channel to which they are connected and can perform their work independently of any connection to the outside.
On an SCSI-type bus, the information messages are composed of a large number of frames, each composed of useful data framed in time by command characters and by what are commonly called status messages, placed at the head and tail of the frame, respectively.
Moreover, all of the functional constituent elements of a computer, whether they are processors, memories or even input/output controllers of peripherals are located on a series of cards with standard dimensions. The cards are connected to the same bus, generally parallel-type, for providing communication between the different processors and data transport between the cards, and for providing them with electric power.
One of the buses most commonly used is the MULTIBUS II (registered trademark of Intel), whose architecture is structured around a main parallel-type bus, commonly called a PSB (Parallel System Bus) standardized according to IEEE (Institute of Electrical and Electronic Engineers) Standard 1296.
As shown in FIG. 1, an exemplary prior art PSB computer bus is connected with two SCSI-type connections, symbolized by the two buses BD.sub.1 and BD.sub.2, by means of a gateway connection device, or a data transmission system, whose function is to adapt the data transmission conditions on the PSB to the transmission conditions on the two SCSI-connection buses BD.sub.1, BD.sub.2. The data transmission modes on the PSB and on the two buses BD.sub.1 and BD.sub.2 are totally different with regard to the data transmission flow, the transmission protocols used, the writing codes, the information, the format, and the command characters.
FIG. 1 shows two data transmission systems MSP.sub.1 and MSP.sub.2. MSP.sub.1 is connected to both the PSB and to the two buses BD.sub.1 and BD.sub.2. The second data transmission system MSP.sub.2 is connected only to the bus BD.sub.2. In the exemplary embodiment shown in FIG. 1, six data storage units are connected to the bus BD.sub.1, namely the five disk memory units D.sub.1 to D.sub.5 and a tape drive T.sub.6. The bus BD.sub.2 is connected to the five disk memories D.sub.7 to D.sub.11 and to tape drive T.sub.12. Since the bus BD.sub.1 is connected to only one data transmission system MSP.sub.1, it has a terminating plug TER on the end next to the tape drive T.sub.6. The PSB bus is connected to a computer.
The general physical structure of a data transmission system (or gateway connection device), shown in FIG. 2, is described in more detail, as are its various modes of embodiment and operation in two patent applications: No. 91 08908 filed on Jul. 15, 1991 by the applicant and entitled "UNIVERSAL DEVICE FOR COUPLING A COMPUTER BUS TO A CONTROLLER OF A GROUP OF PERIPHERALS," and No. 91 08907 filed on the same day by the same company entitled "OPERATING SYSTEM FOR UNIVERSAL DEVICE FOR COUPLING A COMPUTER BUS TO A SPECIFIC CONNECTION ON A NETWORK."
A data transmission system MSP is composed of two parts, namely a universal coupling device GPU (General Purpose Unit) and an adapter DEA.
The GPU device is connected to the PSB by a coprocessor MPC, such as a VL 82c389 manufactured by Intel, which communicates by message mode with the computer; this mode is defined in the above-mentioned IEEE standard 1296.
The DEA device is physically connected to the two buses BD.sub.1 and BD.sub.2, to which are connected the different storage units indicated in FIG. 1, respectively. All the disks D.sub.1 to D.sub.5 and the tape drive D.sub.6 form the mass memory system SCSI.sub.1, while the other disks D.sub.7 to D.sub.11 and the tape drive D.sub.12 form the mass memory system SCSI.sub.2.
The GPU device includes the following different basic constituent elements:
the MPC coprocessor already mentioned; PA1 a CPU microprocessor, which in fact constitutes the central processing unit of the GPU device, equipped with an internal bus BI for transporting commands and instructions intended for the different storage units making up the systems SCSI.sub.1 and SCSI.sub.2, and an address bus BAD transporting the addresses for these different commands. This microprocessor is combined respectively with an erasable programmable memory EPROM, a read-write memory SRAM and an interrupt manager, namely MFP. All these elements, EPROM, SRAM and MFP are connected to the internal bus BI and the address bus BAD; PA1 a dual-port video-RAM-type memory indicated by VRAM; PA1 a direct memory access controller DMAC, connected to the bus B.sub.2 connecting that controller to the VRAM memory and to the bus B.sub.3 connecting it to the coprocessor MPC; and PA1 a bus B.sub.1 which connects the VRAM memory to the adapter DEA, whose constituent elements will be described below. PA1 a central microprocessor connected to at least one memory containing an operating system designed to be executed by it; PA1 means of transferring frames from the computer bus to the connection and vice versa, whose work is organized and managed by the microprocessor, including a data storage memory located between the bus and the connection; and PA1 is characterized by the fact that it includes at least one slave input/output microprocessor of the central processor connected, on one hand, to said memory and, on the other, to said connection. PA1 an initialization process for the entire application; PA1 a large number of distinct, separate adaptation processes, each of which is associated with a certain type of storage unit; and PA1 at least one task management process.
In the exemplary embodiment described here, the CPU microprocessor is the 68020 type manufactured by Motorola. The internal bus BI is a non-multiplexed 32-bit bus, while the BAD bus is on 32 address bits.
The erasable read-only memory EPROM has, for example, a capacity of 128 or 256 KB, and it contains self-testing and GPU initialization programs.
The operating system of the CPU microprocessor designated by GPOS (English acronym for General Purpose Operating System) is contained in the static memory SRAM and is loaded upon initialization of the coupling device GPU. The capacity of this memory is 512 KB or 1 MB, for example. It is described in the above-mentioned application No. 91 08907.
FIG. 2 shows that the direct access controller DMAC connected in series between the VRAM memory and the MPC coprocessor, and between the latter and the bus BI of the microprocessor CPU.
A detailed description of the structure and operation of the controller DMAC is given in French patent application No. 91 15814, filed on Dec. 19, 1991, by the applicant company under the title "CONTROLLER FOR MULTIPLE TRANSFER OF DATA BETWEEN A LARGE NUMBER OF MEMORIES AND A COMPUTER BUS."
The operating system, here called GPOS, organizes the operation of the entire microprocessor and consequently supervises the transfer of the frames coming from the computer (or from one of the systems SCSI.sub.1, SCSI.sub.2) from the bus PSB to the VRAM memory and vice versa. The adaptation program for the protocols used between the computer and the coupling device via the bus PSB and the SCSI-type connection is contained, for example, in the memory SRAM.
The microprocessor CPU is thus the brains of the coupling device GPU: it initializes the transfer of data, adapts the protocols, runs its operating system and transfers the data between DEA and the computer and vice versa, while dialoguing with DEA, with which it exchanges commands and statuses, for example, in a way that will be described below.
A detailed description of the role and operation of the other elements of the coupling device is given in the three patent applications mentioned above.
The basic constituent elements of the operating system GPOS of the universal coupling device GPU are presented in FIG. 3. The operating system GPOS is composed of the central node NY which performs the basic system functions, surrounded by a large number of managers, each performing a specific function. These managers are the applications manager GA, the intercommunications server SA, the event manager GI, the starter ST, the command manager GC, the terminal access manager GAT and the interactive checker IOMX.
Around this operating system gravitate applications which are in fact associated with it, each of them communicating and dialoguing with the central node NY and all or some of the managers surrounding it. The applications are autonomous and independent of one another. In the data transmission system of the invention, there are two of these applications, and they are called A.sub.1 and A.sub.2.
In the example of embodiment of the invention described here, the application A.sub.1 is for the mass memory system SCSI.sub.1, while the application A.sub.2 is for the mass memory system SCSI.sub.2. The role of each application consists of, on one hand, performing the transfer of data in both directions between the memory VRAM and each of the disk memories and tape drives belonging to SCSI.sub.1 and SCSI.sub.2, where these data must be written or read and, on the other hand, transferring the write or read commands for those same data to those same disk memories and tape drives.
The basic elements of the operating system GPOS are the node NY, the applications manager GA and the intercommunication server SA. The other managers will not be described further here. Their roles are described more fully in the above-mentioned French patent application No. 91 08907.
The node NY basically runs the system by managing and organizing in real time the work of the two applications A.sub.1 and A.sub.2, when one and/or the other is running. It responds to the requests of the managers that surround it when they ask it for a service, but takes no initiative. It also activates the processes of which each of the applications A.sub.1 and A.sub.2 is composed. The manager GA monitors and defines the status in which one or both of the applications A.sub.1, A.sub.2 is found. There are five of these statuses called E.sub.0 to E.sub.5. Status E.sub.0 means that the service offered by the application is not available. Status E.sub.1 is the status whereby the application is run and, in particular, it is the one where the initialization operations for all the processes constituting the application and all the corresponding tables are performed. Status E.sub.2 is the most frequent and is the one in which the application is in the process of running. Status E.sub.3 is the status where the application is in the process of terminating or even in the process of aborting. Status E.sub.5 is the status for which the application is interrupted for a fault or an error. Greater detail on each of these statuses is given in the above-mentioned French application No. 91 08907.
The intercommunication server for applications SA allows each of them to communicate with another when necessary. Because each of the applications is autonomous and independent compared to the others, they can communicate with one another only through this server SA.
The different elements GPOS communicate with one another and with A.sub.1 and A.sub.2 by monitor calls symbolized by the arrows FA.sub.i (between NY and A.sub.1 -A.sub.2), FG.sub.1 -FG.sub.2 (between NY and GA-SA) F.sub.1 -F.sub.2 (between GA and A.sub.1 -A.sub.2) FS.sub.1 -FS.sub.2 (between SA and A.sub.1 -A.sub.2). These calls are described more fully in French application No. 91 08907.
This invention defines the role and function of one of the applications A.sub.1, A.sub.2 as part of the data transmission system to which they belong through their association with an operating system GPOS.